This invention relates generally to a method of making and a structure of a gate and interconnect metallization for an integrated circuit device and more particularly to a multi-layer metallization method and structure.
Multi-layer metallization structures are discussed in J. L. Vossen, "VLSI Metallization Problems and Trends," Semiconductor International, September 1981, pages 91-99 and in S. M. Sze, "VLSI Technology," 1983, pages 360-372. Many variations have been suggested. One multi-layer metallization structure of particular interest conventionally comprises a conductor of a noble metal, such as gold, with a barrier layer of a refractory metal, such as titanium-tungsten, deposited between the conductor metal and the substrate surface. The purpose of barrier metallization is to inhibit diffusion of the gold into the substrate, typically silicon, and formation of an eutectic that impairs the semiconductive properties of the substrate material. Conventional metallization processes include forming an oxide (SiO.sub.2) layer on the silicon substrate, forming contact openings in the oxide layer over semiconductor devices formed in the substrate, sputter-depositing a layer of titanium-tungsten onto the substrate surface, patterning the barrier metallization, and gold plating the conductor metal onto the barrier metal. An example of such processes is detailed in D. Summers, "A Process for Two-Layer Gold IC Metallization," Solid State Technology, pages 137-141, December 1983.
Field threshold voltage is the static voltage required between an electrode contacting the field oxide and the underlying semiconductor substrate (i.e., across the field oxide) to invert the underlying region of a doped semiconductor substrate from one type (e.g., p-type) to the other (e.g., n-type). In MOS technology this corresponds to gate threshold voltage, V.sub.t. One problem with gate metallization structures as described above is that the circuit devices frequently exhibit a large field threshold voltage shift. The measurement of field threshold voltage shift is conventionally expressed in terms of a shift of flat band voltage in millivolts per thousand angstroms of field oxide thickness. A typical inversion voltage for a bipolar integrated circuit fabricated on a doped silicon substrate (sheet resistance of about 4,000 ohms per square) is in the range of 20-25 volts for a field oxide thickness of about 1 micron. In cases of mobile sodium ion contamination, within the field oxide, this voltage can shift downward 10 volts or more (1 volt/1000 .ANG.), causing device isolation within the substrate to fail. An acceptable amount of voltage shift is normally 5 volts or less (under 500 millivolts/1000 .ANG. of field oxide thickness).
It has been suggested that a cause of this problem is the introduction of sodium ions (Na+) into the field oxide from the barrier metal. Titanium-tungsten targets conventionally used in sputter-depositing the barrier metal layer onto the substrate surface are believed to be commonly contaminated with large amounts of sodium. We have demonstrated experimentally that the titanium-tungsten barrier metal is a major contributor of the field oxide sodium ions.
It has been proposed to getter the sodium ions with a gettering material, such as phosphorus silicate glass (PSG). PSG has been commonly used as an interlevel dielectric with aluminum and aluminum-alloy metallizations on silicon. One proposal suggested depositing a 1000 .ANG. PSG layer after deposition of insulative nitride and oxide layers over the metallization structure, but the nitride layer proved to be an effective barrier to sodium diffusion. Consequently, very long anneal times (more than seven hours at 400.degree. C.) proved to be ineffective for gettering using this arrangement.
Another problem with this proposal is the difficulty of obtaining adequate adhesion of the PSG layer to other materials in the device structure. In particular, adhesion of PSG to gold is rather poor, leading to delamination problems. To avoid such problems, D. Summers (p. 138) recommends using an adhesion layer of silicon nitride between such materials. Doing so, however, effectively precludes using PSG for gettering sodium ions from the barrier metal and field oxide.
Accordingly, a need remains for a multi-layer metallization structure and method that will permit the use of a barrier metal such as titanium-tungsten that may be contaminated with metal ions, particularly sodium, without degrading operating characteristics of the integrated circuit.